Senior SoC HW (Analog/Functional) Validation Engineer
Microsoft
Senior SoC HW (Analog/Functional) Validation Engineer
Hillsboro, Oregon, United States
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Overview
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate, high-energy engineers to help achieve that mission.
The Silicon Computing development team is currently seeking a Senior Systems on Chip Hardware (Digital, Analog or Power and Performance) Validation Engineer to join the post-silicon validation team, which encompasses functional, electrical, and power/performance aspects. This team is responsible for working on numerous projects within Microsoft, focusing on the development of custom silicon for a diverse range of systems. Their ultimate goal is to deliver cutting-edge and custom System-on-Chip designs capable of efficiently performing complex and high-performance functions.
We are looking for a Senior SoC HW (Analog/Functional) Validation Engineer to join the team.
Qualifications
Required/minimum qualifications
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
- 4+ years of experience in SoC subsystem, SoC system level, and platform level functionality and writing scripts/software with industry standard languages like Python or C/C++.
Other Requirements:
- Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
Additional Preferred Requirements:
Proficient communication, collaboration, and teamwork skills, with the ability to lead, grow, and contribute to diverse and inclusive teams
Experience in verification, logic development, analog validation, or validation tools as part of a CPU, SoC, and/or IP development team
Leadership skills
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Demonstrated validation expertise in one or more of the following areas:
Electrical validation: SerDes, IO, high-speed interconnects, analog circuits
Power and performance validation
Automation, content creation, or tools/scripts development
Ability to develop synthetic SoC validation content for Core, Coherency, Memory, and IO, to run on both bare-metal and OS environments
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Ability to develop sophisticated tools/scripts to support SoC validation and debug activities, including:
Maximum power analysis
Current transient measurements
Register dumps
Understanding of board-level schematics
Understanding of system-level software and firmware
Experience running silicon content on pre-silicon platforms such as emulation or FPGA
Demonstrated success in hardware/software debug efforts
Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $158,400 - $258,000 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay
Microsoft will accept applications for the role until July 25th, 2025.
#azurehwjobs #SCHIE #microsoftpdx #MicrosoftSiliconValidation #AHSI
Responsibilities
- Own post-silicon validation of one of the following areas:
IO electrical/analog
Functional IO interfaces
Define, guide, and contribute to the implementation of silicon debug tools and capabilities
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Become an expert in high-speed IO interfaces (e.g., PCI, CXL), including:
Their architecture and implementation
Interaction with other SoC components, the platform, and software
Provide technical guidance, coaching, and mentorship to other engineers
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Develop validation strategy, requirements, environments, tools, and methodologies
Including debug board and hardware/software requirements
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Write and implement test plans using:
Validation principles and techniques
Test content, scripts, tools, and collateral
Execute test content in post-silicon environment; triage and debug failures
Apply a growth mindset to learn and adapt in a dynamic environment
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Collaborate with partners to improve design, validation plans, and methodology
Aim to detect bugs earlier, more reliably, and efficiently
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Embrace a One Microsoft approach by collaborating with:
Architects, logic designers, verification engineers
Other post-silicon validators, IP and tool providers
Deliver high-quality results on schedule to satisfy customer expectations
Provide technical leadership with respect and integrity
Contribute to pre-silicon verification planning, testing, and debugging in your area